1. Field of the Invention
The present invention relates to an amplitude variable type differential amplifier capable of varying an output level or amplitude.
2. Prior Art
In a logical circuit for outputting two voltage levels, i.e. H and L levels, there has been employed an amplitude variable type differential amplifier capable of varying output amplitude such as H and L levels.
The prior art differential amplifier will be now described with reference to FIGS. 6 to 8. FIG. 6 is an amplitude variable type differential amplifier comprising a pair of transistors, FIG. 7 is an amplitude variable type differential amplifier comprising two pairs of transistors, and FIG. 8 is a circuit diagram of an example of a constant current source employed by the amplitude variable type differential amplifier in FIGS. 6 and 7.
In FIG. 6, denoted at 1 is a positive-phase input terminal, 1' is a negative-phase input terminal, 2 and 2' are transistors, 3 and 3' are load resistors having resistance value R.sub.c. Denoted at 4 is a constant current source having a current value I.sub.E for emitters of the transistors 2 and 2', and 5 is a power source having a voltage value of V.sub.cc, 6 is a positive-phase output terminal and 6' is a negative-phase output terminal.
In FIG. 7, denoted at 2a, 2a', 2b, and 2b' are respectively transistors for constituting the differential amplifier. In the differential amplifier of FIG. 7, transistors 2a and 2b correspond to the transistor 2 of FIG. 6, wherein a base, an emitter and a collector of the transistor 2a are respectively connected in parallel with those of the transistor 2b, and transistors 2a' and 2b' correspond to the transistor 2' of FIG. 6, wherein a base, an emitter and a collector of the transistor 2a' are respectively connected in parallel with those of the transistor 2b'. Other elements in FIG. 7 are the same as those in FIG. 6.
In FIG. 8, denoted at 7 is a constant current value setting voltage input terminal, 8 is a constant current output, 9 is a transistor, 10 is a resistor having a resistance value R.sub.E, 11 is a constant voltage source having a voltage value V.sub.EE. Briefly explaining, suppose that a base current can be ignored and an emitter current and a collector current are same in value.
In FIG. 6, logical voltages having phases which are inverted with each other are applied to the positive-phase input terminal 1 and the negative-phase input terminal 1'. Supposing that the voltage applied to the positive-phase input terminal 1 is H level, and the voltage applied to the negative-phase input terminal 1' is L level, the transistor 2 is turned on and the transistor 2' are turned off. As a result, the current I.sub.E which is the same as the current value of the constant current source 4 flows in the collector of the transistor 2, so that the negative-phase output terminal 6' takes the value expressed as V.sub.CC -R.sub.C .times.I.sub.E, namely, it goes L level, while the positive-phase output terminal 6 takes the value of V.sub.CC, namely, it goes H level.
When the voltages of the positive and negative-phase input terminals 1 and 1' are inverted so that the voltage of the positive-phase input terminal 1 goes L level while the voltage of the negative-phase input terminal 1' goes H level, the voltages of the positive-phase and negative-phase output terminals 6 and 6' are also inverted so that the voltage of the negative-phase output terminal 6' goes H level, i.e. V.sub.cc, while the positive-phase output terminal 6 goes L level, namely, the voltage value expressed as V.sub.CC -R.sub.C .times.I.sub.E. Accordingly, the voltage amplitude V.sub.P at the positive-phase and negative-phase output terminals 6 and 6' takes values expressed by R.sub.c .times.I.sub.E.
With the arrangement of the amplitude variable type differential amplifier, the H level can be varied by varying the voltage V.sub.CC of the power source 5, and the L level can be varied by varying the resistance value R.sub.C of the load resistors 3 and 3' or by varying the current value, namely, the current value I.sub.E of the constant current source 4.
The resistance value R.sub.C can be continuously varied only by moving the variable resistor mechanically by a motor, etc. However, there occurs such a problem that it takes a long time for varying the resistance value and the size of the variable resistor is made large. There occurs another problem in that a circuit employing the variable resistor is inferior in frequency characteristics since the frequency characteristic of the variable resistor do not extend to a high frequency range.
It is also possible to vary discontinuously the resistance value R.sub.C by switching some fixed resistors. In this case, it is necessary to change a circuit configuration by providing a circuit switch such as a relay, etc. in the circuit. Accordingly, the resistance value R.sub.C can be varied at high speed and the circuit switch can be made small sized compared with the mechanical change using the motor, but the switching time and the external dimensions of the circuit switch are still not practically satisfied. Further, since there is no relay which is excellent in frequency characteristic, the circuit employing this relay is inferior in the frequency characteristics.
Whereupon, it is possible to vary an output amplitude by changing a collector current without changing a circuit configuration per se. In this case, it is possible to obtain excellent results in respect of switching time, external dimensions and frequency characteristic. Accordingly, the L level is normally varied by varying the collector current.
If the circuit as shown in FIG. 8 is employed as the constant current source 4, the current value of the constant current source 4 can be easily controlled by a voltage to be applied to the constant current value setting voltage input terminal 7. As a result, the output amplitude V.sub.P can be controlled.
If the resistance value R.sub.C of the load resistors 3 and 3' is made large, a large amplitude can be obtained by a small amount of collector current, and a large amplitude variation can be made with a slight change of the collector current value. Further, there is an advantage that the less the current flows, the less the power is consumed.
However, although the necessary current may be small when the output amplitude V.sub.P is large, the collector current is made very small for a small amplitude. Since the operating speed of the transistor is greatly reduced when the collector current is small, a high speed signal can not be amplified in case of obtaining the small amplitude. Conversely speaking, the minimum collector current, i.e. minimum output amplitude is determined depending on a degree of amplification of the high speed signal.
On the other hand, if the resistance value R.sub.C of the load resistors 3 and 3' is made small, the reduction of the operating speed can be prevented, but consumption power in the circuit is made large since the value of current flowing in the circuit to obtain a large amplitude is made large. Further, since the transistor is destroyed when the very large collector current flows therethrough, the large amplitude can not be obtained when the resistance value R.sub.C is small. As mentioned above, the resistance value R.sub.C of the load resistors 3 and 3' can be made neither very large nor very small.
That is, the maximum value of the output amplitude V.sub.P is determined by the maximum collector current of the transistors 2 and 2', and the minimum value of the output amplitude V.sub.P is determined by the allowable degree of speed production which is caused by the reduction of the collector current of the transistors 2 and 2'. If the maximum value of the output amplitude V.sub.P is further increased, the differential amplifiers may be connected in parallel with each other.
Described next is a prior art circuit configuration wherein the differential amplifier comprising the transistors 2a and 2a' and the differential amplifier comprising the transistors 2b and 2b' are respectively connected in parallel with each other as shown in FIG. 7. In FIG. 7, since two circuits are connected in parallel with each other, it is possible to flow a current that is twice as large as the current flowing in the circuit of FIG. 6. Accordingly, it is possible to obtain the output amplitude V.sub.P to the extent that is twice as large as that in FIG. 6. Since the high speed transistor is generally small in its maximum collector current, it is impossible to manufacture the high speed circuit which is large in the amplitude variation unless the circuits are connected in parallel with each other.
When the differential amplifiers are connected in parallel with each other, it is possible to obtain the maximum output voltage amplitude by multiplying that of each amplifier and the number of parallel connections of the differential amplifiers. However, in the prior art circuit configuration, since the maximum and minimum amplitudes can be determined by the value of current flowing in one transistor, the minimum output voltage amplitude is increased to an extent that is several times as large as the number of parallel connections of the differential amplifiers, which generates a problem in that the variable range of an output amplitude can not be made large.